Intel® Cyclone® 10 GX FPGA Development Kit User Guide

ID 683696
Date 8/15/2018
Document Table of Contents
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4.5.1. Switches

Power Switch

The Power Switch S14 is at the edge of the card. When the switch stub is at higher position (marked 'OFF'), the power is OFF.

Note: When the board is inserted into a PCIe* slot in computer, the power switch is override. The board is powered ON/OFF with the PCIe* system irrespective of the position of the power switch.

DIP Switches

The DIP switches are on the bottom side of the board, close to the upper edge.

Table 11.  DIP Switch Definition
Board Reference Switch Signal Name Default Value Function
S9 S9.1 USER_DIP0 1 User available Digital Input 0
S9.2 USER_DIP1 1 User available Digital Input 1
S15 S15.1 USER_DIP2 1 User available Digital Input 2
S15.2 USER_DIP3 1 User available Digital Input 3
S6 S6.1 CFG_M10_PGM0 1 Reserved, No Function
S6.2 CFG_M10_PGM0 1
S1 S1.1 C10_MSEL0 1 Intel® Cyclone® 10 GX MSEL
S1.2 C10_MSEL1 1
S3 S3.1 Si5340_INSEL0 1

Input selection for clock generator chip, the Si5332 on this board

[INSEL1, INSEL0] values:

01 - internal oscillator

10- external reference input from SMB

Set to 01 by default

S3.2 Si5340_INSEL1 0

Set the input source of Si53307

0: Use CLKIN0

1: Use CLKIN1

Fixed to '0'

S2.2 Si570_OE 1

Enable the output of Si570 (Y2)

0: Output disabled

1: Output enabled

Fixed to '1'


Enable FMC Card JTAG

0: Isolate FMC card JTAG from the chain

1: Add FMC Card JTAG into the chain

S5.2 C10_JTGEN 1

Enable Intel® Cyclone® 10 GX FPGA JTAG

0: Isolate FPGA JTAG from the chain

1: Add FPGA JTAG into the chain