Cyclone® 10 GX FPGA Development Kit User Guide

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ID 683696
Date 8/09/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Document Revision History for the Cyclone® 10 GX FPGA Development Kit User Guide A. Development Kit Components B. Additional Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Quartus® Prime Software and Driver Installation 2.2. Development Kit Package
3. Development Kit Setup x
3.1. Setting up the Development Kit 3.2. Default Switch and Jumper Settings
4. Board Test System x
4.1. Preparing the Board 4.2. Running the Board Test System 4.3. Using the Board Test System
4.3. Using the Board Test System x
4.3.1. The Configure Menu 4.3.2. The System Info Tab 4.3.3. The GPIO Tab 4.3.4. The EPCQ Tab 4.3.5. The XCVR Tab 4.3.6. The FMC Tab 4.3.7. The DDR3 Tab 4.3.8. Power Monitor 4.3.9. Clock Controller
A. Development Kit Components x
A.1. Board Overview A.2. Cyclone® 10 GX FPGA A.3. MAX 10 System Controller A.4. FPGA Configuration A.5. Status and User I/O Elements A.6. Clocks A.7. Memory A.8. Power A.9. Transceivers Interfaces and Communication Ports
A.5. Status and User I/O Elements x
A.5.1. Switches A.5.2. Pushbuttons A.5.3. LEDs
A.7. Memory x
A.7.1. EMIF with DDR3 A.7.2. QSPI Flash
A.9. Transceivers Interfaces and Communication Ports x
A.9.1. Transceiver Channels A.9.2. PCIe Interface A.9.3. SFP+ Interface A.9.4. USB3.1 Type-C Interface A.9.5. FPGA Mezzanine Card (FMC) Interface A.9.6. 10/100/1000Base-T Ethernet Connector A.9.7. I2C/PMBUS
B. Additional Information x
B.1. Safety and Regulatory Information B.2. Compliance and Conformity Statements
B.1. Safety and Regulatory Information x
B.1.1. Safety Warnings B.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Document Revision History for the Cyclone® 10 GX FPGA Development Kit User Guide
A. Development Kit Components
B. Additional Information

2.1. Installing the Quartus Prime Software

The Intel® Quartus® Prime design software is a multiplatform design environment that easily adapts to your specific needs in all phases of FPGA, CPLD, and SoC designs. The Intel® Quartus® Prime software delivers the highest performance and productivity for Intel® FPGAs, CPLDs, and SoCs.

Design software must enable dramatically increased design productivity in order to take advantage of devices with multi-million logic elements with increased capabilities that provide designers with an ideal platform to meet next-generation design opportunities.

The new Intel® Quartus® Prime Design Suite design software includes everything needed to design for Intel® FPGAs, SoCs and CPLDs from design entry and synthesis to optimization, verification and simulation. The Intel® Quartus® Prime Design Suite software includes an additional Spectra-Q® engine that is optimized for Intel® Stratix® 10 and future devices. The Spectra-Q® engine enables new levels of design productivity for next generation programmable devices with a set of faster and more scalable algorithms, a hierarchical database infrastructure and a unified compiler technology.

Intel® Quartus® Prime Software

The Intel® Quartus® Prime Design Suite software is available in three editions based on specific design requirements: Pro, Standard, and Lite Edition.

The Intel® Quartus® Prime Pro Edition is optimized to support the advanced features in Intel's next generation FPGAs and SoCs.

The Intel® Cyclone® 10 GX FPGA is only supported on Intel® Quartus® Prime Pro Edition. There is no paid license fee required for Intel® Cyclone® 10 GX support in Intel® Quartus® Prime Pro Edition.

Included in the Intel® Quartus® Prime Pro Edition are the Intel® Quartus® Prime software, Nios® II EDS and the MegaCore IP Library.

To install Intel® 's development tools, download the Intel® Quartus® Prime Pro Edition software from the Quartus Prime Pro Edition page from the Download Center of Intel® 's website.

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