CPRI Intel® FPGA IP User Guide

ID 683595
Date 11/11/2021

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Document Table of Contents

5.22. RX_EX_DELAY Register

Table 74.  IRX_EX_DELAY Register at Offset 0x54
Bits Field Name Type Value on Reset Description
31:24 rx_msrm_period RW 8'b0 Integration period for Rx buffer extended delay measurement.

Program this field with the user-defined value NR, where M/NR = ex_delay_clk period / cpri_clkout period.

23 rx_ex_delay_valid RC 1'b0 Indicates that the rx_ex_delay field has been updated.
22:RX_BUF_DEPTH Reserved UR0 0
(RX_BUF_DEPTH -1):0 rx_ex_delay RO 0 Rx buffer extended delay measurement result. Unit is cpri_clkout clock periods.