CPRI Intel® FPGA IP User Guide

ID 683595
Date 11/11/2021

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5.23. ROUND_TRIP_DELAY Register

Table 75.  ROUND_TRIP_DELAY Register at Offset 0x58
Bits Field Name Type Value on Reset Description
31:20 Reserved UR0 12'b0
19:0 round_trip_delay RO 20'b0 Measured relative round trip delay between transmit sync BYTE at REC output and RX sync BYTE at REC input. The IP core uses this delay to adjust the relative delay of the rising edge of auxN_rx_rfp with respect to the rising edge of auxN_tx_rfp. Unit is cpri_clkout clock periods. The IP core updates this field with every radio frame.