CPRI Intel® FPGA IP User Guide

ID 683595
Date 11/11/2021

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5.34. IP_INFO Register

Table 86.  IP_INFO Register at Offset 0x8CThis register is present only in IP core variations that target an Intel® Stratix® 10 device.
Bits Field Name Type Value on Reset Description
31:8 Reserved UR0 24'b0 -
7:0 SPEC_VER RO 10 Bits [7:4] indicates the base number of the CPRI specification and bits [3:0] indicates the number after the decimal point of the CPRI specification.

For example, if the current IP is compliance to CPRI specification v7.0, this field returns to 8'b0111_00000 and if the IP is compliance to CPRI specification v6.1, then this field returns to 8'b0110_0001.

10 The value is hard-coded and reset does not affect this value.