CPRI Intel® FPGA IP User Guide

ID 683595
Date 11/11/2021

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.5.4. Direct Interface CPRI Frame Data Format

The information on the AUX interface and all of the other direct interfaces except the L1 CSR interface, appears in the relevant data bus in 32-bit words. The CPRI Intel® FPGA IP converts the contents of the incoming CPRI frame to a 32-bit format internally. Similarly, the IP core expects to receive data on the various direct interfaces in this format. The only exception is the L1 CSR interface, which transmits and receives information in individual bits.

Figure 33. AUX Interface Data at Different CPRI Line Bit RatesThe AUX interface presents and expects data in fixed 32-bit words. The mapping of the CPRI frame to and from 32-bit words depends on the CPRI IP bit rate. This figure illustrates how CPRI frame words are mapped to 32-bit words on the AUX interface 32-bit data bus.

The CPRI IP core passes the incoming AUX data through to the CPRI link unmodified. You must ensure that the incoming AUX data bits already include any CRC values expected by the application at the other end of the CPRI link.

Figure 34. Data Sample Order on aux_tx_data and aux_rx_data BusesIllustrates how CPRI frame data is ordered in each 32-bit word.