Intel® Stratix® 10 TX Transceiver Signal Integrity Development Kit User Guide

ID 683591
Date 9/27/2019
Document Table of Contents

5.3.9. The QSFPDD2x1 Tab

The QSFPDD2x1 Tab allows you to run transceivers QSFPDD2x1 loopback tests on your board. Install two QSFPDD loopback modules into QSFPDD2x1 interface, configure the FPGA with QSFPDD2x1 image.

Figure 28. The QSFPDD2x1 Tab

The following sections describe the controls on the QSFPDD2x1 tab.


The Status control displays the following status information during the loopback test:
  • PLL lock: Shows the PLL locked or unlocked state
  • Pattern Sync: Shows the pattern synced or not state. The pattern is considered synced when the start of the data sequence is detected.
  • Details: Shows the details of PLL lock, pattern status and error bits of each channel.
Figure 29. QSFPDD2X1 Status


Use the following controls to select an interface to apply PMA settings, data type and error control:
  • QSFPDD2x1

PMA Setting

Allows you to make changes to the PMA parameters that affect the active transceiver interface. The following settings are available for analysis:
  • Serial Loopback: Routes signals between the transmitter and the receiver.
  • VOD: Specifies the voltage output differential of the transmitter buffer.
  • Pre-emphasis tap:
    • Pre-tap 1: Specifies the amount of pre-emphasis on the first pre-tap of the transmitter buffer.
    • Pre-tap 2: Specifies the amount of pre-emphasis on the second pre-tap of the transmitter buffer.
    • Pre-tap 3: Specifies the amount of pre-emphasis on the third pre-tap of the transmitter buffer.
    • Post-tap 1: Specifies the amount of pre-emphasis on the post-tap of the transmitter buffer.
  • Equalizer: Specifies the RX tuning mode for receiver equalizer.
Figure 30. QSFPDD2X1 PMA Setting

Data Type

The Data Type control specifies the type of data pattern contained in the transactions. Select the following available data types for analysis:
  • PRBS7: pseudo-random 7-bit sequences (default)
  • PRBS15: pseudo-random 15-bit sequences
  • PRBS23: pseudo-random 23-bit sequences
  • PRBS31: pseudo-random 31-bit sequences
  • HF: Selects highest frequency divide-by-2 data pattern 10101010.
  • LF: Selects lowest frequency divide-by-33 data pattern.

Error Control

This control displays data errors detected during analysis and allows you to insert errors:
  • Detected Errors: Displays the number of data errors detected in the received bit stream.
  • Inserted Errrors: Displays the number of errors inserted into the transmit data stream.
  • Bit Error Rate: Displays the error rate of data transaction.
  • Insert Error: Insert a one-word error into the transmit data stream each time you click the button. Insert Error is only enabled during transaction performance analysis.
  • Clear: Resets the Detected Errors counter and Inserted Errors counter to zeros.

Run Control

TX and RX performance bars: Show the percentage of maximum theoretical data rate that the requested transactions are able to achieve.

Start: This toggle button initiates and stops the tests.

Tx (Mbps) and Rx (Mbps): Show the number of bytes of data analyzed per second.