Networking Interface for Open Programmable Acceleration Engine: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
ID
683532
Date
8/05/2019
Public
2.2.1.1. Clocks in 4x10GBASE-SR Mode
2.2.1.2. Unified Data Interface in 4x10GBASE-SR Mode
2.2.1.3. PHY Control and Status in 4x10GBASE-SR Mode
2.2.1.4. PR Management in 4x10GBASE-SR Mode
2.2.1.5. Reset Control and Status in 4x10GBASE-SR Mode
2.2.1.6. Initialization in 4x10GBASE-SR Mode
2.2.1.7. Unused 10GbE Channels
3.1.4.1. Receiver CTLE AC Gain sysfs Encodings
3.1.4.2. Receiver VGA sysfs Encodings
3.1.4.3. Receiver CTLE DC Gain sysfs Encodings
3.1.4.4. Transmitter Pre-Emphasis First Post Tap Encodings
3.1.4.5. Transmitter Pre-Emphasis Second Post Tap Encodings
3.1.4.6. Transmitter Pre-Emphasis First Pre Tap Encodings
3.1.4.7. Transmitter Pre-Emphasis Second Pre Tap Encodings
3.1.4.8. Transmitter VOD Encodings
3.2. Managing the Network Port
Manage the network port from the host using the OPAE driver sysfs files. The sections that follow cover some management use cases. You must read Configuring the Network Port before using the feature from any host application.
The examples illustrate managing the network port through the driver sysfs files from a shell terminal window using Linux commands and OPAE tools. From a host application, use calls to open(), read(), write() and close() from the stdio library on the sysfs files and parse the strings according to the format documented in the preceding sections.