Networking Interface for Open Programmable Acceleration Engine: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

ID 683532
Date 8/05/2019
Document Table of Contents Initialization in 4x10GBASE-SR Mode

The MAC and related AFU logic can optionally use the handshake initialization signaling between the AFU and HSSI PHY. If you do not use the initialization handshake control, statically drive a2f_init_start high.