Multi Channel DMA for PCI Express* Intel® FPGA IP Design Example User Guide

ID 683517
Date 2/06/2022
Public

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2.3.1.2. Single-Port Avalon-ST PIO Using MCDMA Bypass Mode

This design example supports the same PIO functionality as the design example described in Four-Port Avalon-ST PIO Using MCDMA Bypass Mode. However, this design example has only one Avalon-ST DMA port (instead of four), which is not connected as shown in the block diagram below.

Figure 5. Single-Port Avalon-ST PIO Using MCDMA Bypass Mode

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