Multi Channel DMA for PCI Express* Intel® FPGA IP Design Example User Guide

ID 683517
Date 2/06/2022

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BAS support is enabled on the hardware. Enable the following flag in user/common/include/ifc_libmqdma.h
#define PCIe_SLOT 0 /* 0 – x16, 1 – x8 */


To verify the write operation:
./cli/perfq_app/ perfq_app -b 0000:01:00.0 -s 512 -e -t 
Figure 43. BAS Write Operation
To verify the read operation:
./cli/perfq_app/perfq_app -b 0000:01:00.0 -s 512 -e -r
Figure 44. BAS Read Operation
To verify the write and read operation:
./cli/perfq_app/perfq_app -b 0000:01:00.0 -s 512 -e -z
Figure 45. BAS Write and Read Operation

Performance test:

The below log is collected on Gen3x16 H-tile:
./cli/perfq_app/perfq_app -b 0000:01:00.0 -s 1048576 –bas-perf
Figure 46. Performance Test BAS Write and Read

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