R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 4/10/2024
Document Table of Contents

E.2. 5x5 Testing Efficiency

The purpose of repeat testing is to quantify Device Under Test (DUT)-to-DUT board copy variation and run-to-run variation. Choosing two or more random boards and sets of silicon can give a good statistical assessment of DUT-to-DUT variation. Performing five power-cycled margin runs gives a good average of the boot-to-boot variation to fit to the statistical model. The boot-to-boot variation is why it is important to force the Physical (PHY) Layer to retrain between tests. System cold reboot is used to force the PHY Layer to retrain and is recommended as part of a margining flow. Intel recommends a 5x5 (five test boards with five power-cycled margin runs on each) data sample for validating PCIe links.