R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 4/10/2023

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Document Table of Contents

C. Implementation of Address Translation Services (ATS) in Endpoint Mode

With the R-tile Avalon® streaming Intel FPGA IP for PCIe:

  • ATS messages/completions are sent and received through the Avalon® streaming interface.
  • Address translation caches (ATC) need to be implemented in the user logic. There must be a separate ATC for each VF/PF that supports ATS.

Refer to the Address Translation Services Revision 1.1 specification, section 4.1 Page Request Message for more details.

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