Intel® Quartus® Prime Standard Edition User Guide: Getting Started

ID 683475
Date 12/16/2019
Document Table of Contents

3.12.1. Flat Compilation without Design Partitions

In a flat compilation flow without any design partitions, the Intel® Quartus® Prime software compiles the entire design in a “flat” netlist.

Although the source code may be hierarchical, the Compiler flattens and synthesizes all the design logic. Whenever you re-compile the project, the Compiler re-performs all available logic and placement optimizations on the entire design.

The flat compilation flow does not require any planning for design partitions. However, because the Intel® Quartus® Prime software recompiles the entire design whenever you change your design, flat design practices may require more overall compilation time for large designs. Additionally, you may find that the results for one part of the design change when you change a different part of your design. You can run Rapid Recompile to preserve portions of previous placement and routing in subsequent compilations. Rapid Recompile can reduce your compilation time in a flat or partitioned design when you make small changes to your design.