MAX® 10 FPGA 10M50 Evaluation Kit User Guide

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ID 683447
Date 11/14/2025
Public
Document Table of Contents
Document Table of Contents x
1. MAX® 10 FPGA 10M50 Evaluation Kit Overview 2. Getting Started 3. Board Components 4. Document Revision History for the MAX® 10 FPGA 10M50 Evaluation Kit User Guide A. Additional Information
1. MAX® 10 FPGA 10M50 Evaluation Kit Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Supported Items Not Included with the Kit
2. Getting Started x
2.1. Powering the Kit 2.2. Installing the Intel® FPGA Download Cable II Driver 2.3. Handling the Kit 2.4. Factory Default Switch and Jumper Settings
3. Board Components x
3.1. Board Overview 3.2. Featured Device: MAX® 10 FPGA 3.3. Configuration 3.4. Status Elements 3.5. Setup Elements 3.6. General User Input/Output 3.7. Clock Circuitry 3.8. Components and Interfaces
3.3. Configuration x
3.3.1. Using the Quartus® Prime Programmer 3.3.2. Selecting the Internal Configuration Scheme
3.7. Clock Circuitry x
3.7.1. Onboard Oscillators 3.7.2. Offboard Clock Input/Output 3.7.3. Clock Control GUI
3.7.3. Clock Control GUI x
3.7.3.1. The Clock Control
3.8. Components and Interfaces x
3.8.1. HDMI Video Output 3.8.2. Pmod Connectors 3.8.3. Memory 3.8.4. Flash 3.8.5. MIPI CSI-2 Transmitter 3.8.6. MIPI CSI-2 Receiver 3.8.7. Power Supply
3.8.3. Memory x
3.8.3.1. LPDDR2
3.8.7. Power Supply x
3.8.7.1. Power Options 3.8.7.2. Power-Up Sequence
A. Additional Information x
A.1. Safety and Regulatory Information A.2. Compliance Information
A.1. Safety and Regulatory Information x
A.1.1. Safety Warnings A.1.2. Safety Cautions
1. MAX® 10 FPGA 10M50 Evaluation Kit Overview
2. Getting Started
3. Board Components
4. Document Revision History for the MAX® 10 FPGA 10M50 Evaluation Kit User Guide
A. Additional Information

1.2. Feature Summary

The MAX® 10 FPGA 10M50 Evaluation Kit features the following major component blocks. For a detailed description of the board components, refer to the Board Components section.
  • Featured Devices
    • MAX® 10 FPGA - 10M50D, dual supply, F484 package (P/N: 10M50DAF484C6GES)
    • MAX® II CPLD - EPM1270M256C4N (onboard Intel® FPGA Download Cable II)
    • DK-DEV-10M50F484-C (Power Solution 2)
      • MPS MPM3632SGPQ-C879-Z —3 A synchronous buck DC-DC converter with integrated inductor
      • MPS MPM3804GG-C879-Z —600 mA synchronous buck regulator with integrated inductor
    • EK-10M50F484 (Power Solution 1)
      • Enpirion* EP5348UI—400 mA PowerSoC synchronous buck regulator with integrated inductor
      • Enpirion* EP5358xUI—600 mA PowerSoC DC-DC step-down converters with integrated inductor
      • Enpirion* EN5329QI/EN5339QI—2 A/3 A PowerSoC low profile synchronous buck DC-DC converter with integrated inductor
  • FPGA configuration
    • Embedded Intel® FPGA Download Cable II (JTAG)
    • Optional JTAG direct via 10-pin header
  • Onboard clocking circuitry
    • 25 MHz single-ended, external oscillator clock source
    • Silicon Labs Si510 crystal oscillator
    • Silicon Labs Si5338 clock generator with programmable frequency GUI
  • Memory devices
    • 64M × 16 1 Gbits LPDDR2 with soft memory controller
    • 512 Mbits Quad Serial Peripheral Interface (Quad SPI) Flash
  • Communication Ports
    • One HDMI video output
    • Two 12-pin Pmod connectors
    • Two 36-pin MIPI FFC connectors and one 16-pin MIPI FFC connector
  • General User I/O
    • General-purpose single-ended through-hole vias (2×5)
    • General-purpose LVDS through-hole vias (2 × 9 LVDS pairs, plus two clock pairs)
    • 5 Green User-defined LEDs
    • 4 User-defined push buttons
    • User DIP Switches (SW1, SW2.1, SW2.2)
  • Power
    • Yellow Power-ON LEDs (D9, D10, D11)
    • USB Y cable (USB Type-A to mini Type-B) for both onboard Intel® FPGA Download Cable II and 5 V/1A power capability
    • Support DC power adapter option, but 5 V power supply and cord are not included in the kit
  • Software
  • Complete documentation
    • User guide, Bill of Material (BoM), schematic, and board files
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