Visible to Intel only — GUID: xto1509073085957
Ixiasoft
Visible to Intel only — GUID: xto1509073085957
Ixiasoft
2.4.2. ECC Parity Flip
When the ECC Encoder Bypass (eccencbypass) port is high, the built-in ECC encoder values are XOR-ed with the 8 parity bits through the parity ports to generate a new set of encoder value. When the ECC Encoder Bypass port is low, the encoder generates the parity bits according to the data input during a write process.
The following table shows an example to construct an 8-bit data width for the parity port.
Parity Bit Sequence | ECC Feature | Is the ECC Decoder able to Recognize and Correct the Data Bit? |
---|---|---|
00000001 | Single-error correction | Yes |
00000011 | Double-adjacent-error correction | Yes |
00000111 | Triple-adjacent-error correction | Yes |
00000101 | Triple-adjacent-error correction | Yes |
00010011 | Non-adjacent double/triple correction/detection | No guarantee |
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