The testbench operates in loopback mode. The following figure shows the flow of the packets in the design examples.
Testbench Block Diagram for Design Examples
The following table lists the components in the testbench.
|Device under test (DUT)||The design example.|
|Avalon driver||Uses Avalon-ST master bus functional models (BFMs) to form transmit and receive paths. The driver also uses the master Avalon-MM BFM to access the Avalon-MM interfaces of the design example components.|
|Packet monitors||Monitor transmit and receive datapaths, and display the frames in the simulator console.|
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