38.1. About the Video Buffer Writer IP
The frame writer supports:
- Maximum frame resolutions of 16,384 by 16,384 pixels with 1 to 8 pixels in parallel and any color space
- Writing of progressive frames or interlaced fields
- Configurable memory packing scheme
- Runtime location of frame or field anywhere in memory
- Configurable interrupt on completion of frame, field, or line writes
- Free running or single-shot mode for event capture
- Configurable discarding of broken fields or frames
- Automatic receiving and storing of up to 16,777,215 fields or frames contiguously in memory with no host control
The IP is available as full or lite variants. For more information on full and lite, refer to the Intel FPGA Streaming Video Protocol Specification. The Video Frame Writer IP takes resolution information from the configurable buffer set registers.
An Avalon memory-mapped interface allows you to configure buffer sets and change the operating mode at run time. You must have this interface for both full and lite variants.
For details about latency and reset behavior for the Video Frame Writer, refer to Video and Vision IPs Functional Description.