25.1. About the Genlock Signal Router IP
Data is input to and output from the Genlock Signal Router IP via a selectable number of ports. The final number of input and output ports is in the range 1 to 32 inclusive, which you can configure in the Genlock Signal Router IP GUI.
At build time, you can configure the input port interfaces in three different modes: Intel video streaming full-raster, Intel clocked video, and clock only mode. The IP automatically extracts timing information from the input signals, and then routes the signals between the input and output ports. You can control the input-to-output routing dynamically at run-time using the processor interface.
The output interface for this IP provides two optional interfaces:
- An interface with a set of discrete timing signals, such as field flag, horizontal, and vertical synchronization timing markers.
- An interface that provides clocks only ports
The timing markers can then pass to internal or external FPGA multirate video clock generators.