2.1. Installing and Licensing Intel® FPGA IP Cores 2.2. IP Catalog and Parameter Editor 2.3. Specifying the IP Core Parameters and Options ( Intel® Quartus® Prime Pro Edition) 2.4. Simulating Intel® FPGA IP Cores 2.5. Simulating the FIR II IP Core Testbench in MATLAB 2.6. DSP Builder for Intel® FPGAs Design Flow
4.1. FIR II IP Core Interpolation Filters 4.2. FIR Decimation Filters 4.3. FIR II IP Core Time-Division Multiplexing 4.4. FIR II IP Core Multichannel Operation 4.5. FIR II IP Core Multiple Coefficient Banks 4.6. FIR II IP Core Coefficient Reloading 4.7. Reconfigurable FIR Filters 4.8. FIR II IP Core Interfaces and Signals
3.3.1. Loading Coefficients from a File
When you import a coefficient set, the FIR II wizard shows the frequency response of the floating-point coefficients in blue and the frequency response of the fixed-point coefficients in red. The FIR II IP core supports scaling on the coefficient set.
- Click Import coefficients, in the File name box, specify the name of the .txt file containing the coefficient set.
Note: The file must have a minimum of five non-zero coefficients.
- In the .txt file, separate the coefficients file by either white space or commas or both.
- Use new lines to separate banks.
- You may use blank lines as the FIR II IP core ignores them.
- You may use floating-point or fixed-point numbers, and scientific notation.
- Use a # character to add comments.
- Specify an array of coefficient sets to support multiple coefficient sets.
- Specify the number of rows to specify the number of banks.
- All coefficient sets must have the same symmetry type and number of taps. For example: # bank 1 and 2 are symmetric 1, 2, 3, 2, 1 1 3 4 3 1 # bank 3 is anti-symmetric 1 2 0 -2 -1 # bank 4 is asymmetric 1,2,3,4,5
- Click Apply to import the coefficient set.
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