FIR II IP Core: User Guide

ID 683208
Date 8/14/2023
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4.8.2.1.3. Multiple Channels on Multiple Wires

In this example, hardware optimization produces a TDM factor of 2, number of channel wires = 3, and channels per wire = 2.
Figure 41. Multiple Channels on Multiple Wires The sink interface to the FIR II IP core when transferring a packet of data over multiple channels on multiple wires. The data width of each channel is 8 bits. Number of channels = 6, clock rate = 200 MHz, and sample rate = 100 MHz
Figure 42. Timing Diagram of Multiple Channels on Multiple WiresThe sink interface to the FIR II IP core when transferring a packet of data over multiple channels on multiple wires. The data width of each channel is 8 bits. Number of channels = 6, clock rate = 200 MHz, and sample rate = 100 MHz