FIR II IP Core: User Guide

ID 683208
Date 8/14/2023
Document Table of Contents

1.1. DSP Intel® FPGA IP Features

  • Avalon® Streaming interfaces
  • DSP Builder for Intel® FPGAs ready
  • Testbenches to verify the IP
  • IP functional simulation models for use in Intel-supported VHDL and Verilog HDL simulators

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