FIR II IP Core: User Guide

ID 683208
Date 8/14/2023
Document Table of Contents
Give Feedback Using Memory Block Threshold

This FIR II IP core threshold is the trade-off between simple delay LEs and small ROM blocks. If any delay’s size is such that the number of LEs is greater than this parameter, the IP core implements delay as block RAM.
  1. To make more delays using block RAM, enter a lower number, such as a value in the range of 20–30.
  2. To use fewer block memories, enter a larger number, such as 100.
  3. To never use block memory for simple delays, enter a very large number, such as 10000.
  4. Implement delays of less than three cycles in LEs because of block RAM behavior.
    Note: This threshold only applies to implementing simple delays in memory blocks or logic elements. You cannot push dual memories back into logic elements.