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Why is FPGA Compilation Different? Types of SYCL* FPGA Compilation FPGA Compilation Flags Emulate and Debug Your Design Evaluate Your Kernel Through Simulation Device Selectors for FPGA FPGA IP Authoring Flow Fast Recompile for FPGA Generate Multiple FPGA Images (Linux only) FPGA BSPs and Boards Targeting Multiple Homogeneous FPGA Devices Targeting Multiple Platforms FPGA-CPU Interaction FPGA Performance Optimization Use of RTL Libraries for FPGA Use SYCL Shared Library With Third-Party Applications FPGA Workflows in IDEs
Intel oneAPI DPC++ Library (oneDPL) Intel oneAPI Math Kernel Library (oneMKL) Intel oneAPI Threading Building Blocks (oneTBB) Intel oneAPI Data Analytics Library (oneDAL) Intel oneAPI Collective Communications Library (oneCCL) Intel oneAPI Deep Neural Network Library (oneDNN) Intel oneAPI Video Processing Library (oneVPL) Other Libraries
Traditional CPU Flow
The traditional CPU workflow runs on the CPU without a runtime. The compilation flow is a standard compilation used when there is no offload to a device, like the one used for C, C++, or other languages.
Traditional workloads are compiled and run on host using the Traditional Compilation Flow (Host-only Application) process described in Compilation Flow Overview.
Example compilation command:
icpx -g -o matrix_mul_omp src/matrix_mul_omp.cpp
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