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Visible to Intel only — GUID: GUID-EA4F9710-78B8-4DEC-A75E-66680FEF136D
Visible to Intel only — GUID: GUID-EA4F9710-78B8-4DEC-A75E-66680FEF136D
Agent IP Component Kernels
SYCL* kernels generate an interface that can control the kernel and pass in the default arguments to the IP component.
By default, the Intel® oneAPI DPC++/C++ Compiler generates an Avalon agent interface to control the kernel and pass in the default arguments. The compiler also generates a header file that provides the addresses of various registers in the agent memory map. A top-level header named register_map_offsets.hpp is created for each device image that you can include if you are interfacing with the SYCL* device image.
An additional header is generated for each of your kernels within the .prj directory. The register_map_offsets.hpp header file includes these files, but contain the addresses and offsets for each of the kernels.
Example Register Map File
/************************************************************************/
/* Memory Map Summary */
/************************************************************************/
/*
Address | Access | Register | Argument
------------|---------|-----------------------|-----------------------------
0x0 | R/W | register0[31:0] | Status[31:0]
------------|---------|-----------------------|-----------------------------
0x28 | R/W | register5[31:0] | FinishCounter[31:0]
| | register5[63:32] | FinishCounter[31:0]
------------|---------|-----------------------|-----------------------------
0x78 | R/W | register15[63:0] | arg_AccRes[63:0]
------------|---------|-----------------------|-----------------------------
0x80 | R/W | register16[63:0] | arg_AccRes1[63:0]
------------|---------|-----------------------|-----------------------------
0x88 | R/W | register17[63:0] | arg_AccRes2[63:0]
------------|---------|-----------------------|-----------------------------
0x90 | R/W | register18[63:0] | arg_AccRes3[63:0]
------------|---------|-----------------------|-----------------------------
0x98 | R/W | register19[31:0] | arg_IntegerVar[31:0]
| | register19[63:32] | arg_LongIntegerVar[31:0]
------------|---------|-----------------------|-----------------------------
0xa0 | R/W | register20[63:0] | arg_LongIntegerVar[95:32]
------------|---------|-----------------------|-----------------------------
0xa8 | R/W | register21[31:0] | arg_LongIntegerVar[127:96]
| | register21[39:32] | arg_BooleanVar[7:0]
*/
/***************************************************************************/
/* Register Address Macros */
/***************************************************************************/
/* Status Register Bit Offsets (Bits) */
/* Note: Bits In Status Registers Are Marked As Read-Only or Read-Write
Please Do Not Write To Read-Only Bits */
#define KERNEL_REGISTER_MAP_GO_OFFSET (0) // Read-write
#define KERNEL_REGISTER_MAP_DONE_OFFSET (1) // Read-only
#define KERNEL_REGISTER_MAP_STALLED_OFFSET (3) // Read-only
#define KERNEL_REGISTER_MAP_UNSTALL_OFFSET (4) // Read-write
#define KERNEL_REGISTER_MAP_BUSY_OFFSET (14) // Read-only
#define KERNEL_REGISTER_MAP_RUNNING_OFFSET (15) // Read-only
/* Status Register Bit Masks (Bits) */
#define KERNEL_REGISTER_MAP_GO_MASK (0x1)
#define KERNEL_REGISTER_MAP_DONE_MASK (0x2)
#define KERNEL_REGISTER_MAP_STALLED_MASK (0x8)
#define KERNEL_REGISTER_MAP_UNSTALL_MASK (0x10)
#define KERNEL_REGISTER_MAP_BUSY_MASK (0x4000)
#define KERNEL_REGISTER_MAP_RUNNING_MASK (0x8000)
While the default option for kernels are agent kernels, there is a register_map_interface macro to mark a function as an agent kernel. This is shown in the following example:
#include <sycl/ext/intel/prototype/interfaces.hpp>
using namespace sycl;
struct MyIP {
int *input_a, *input_b, *input_c;
int n;
MyIP(int *a, int *b, int *c, int N_)
: input_a(a), input_b(b), input_c(c), n(N_) {}
register_map_interface void operator()() const {
for (int i = 0; i < n; i++) {
input_c[i] = input_a[i] + input_b[i];
}
}
};