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Integrating Your IP Into a System
To integrate your IP component into a system with the Intel® Quartus® Prime software, you must be familiar with Intel® Quartus® Prime software, including Platform Designer.
The Intel® oneAPI DPC++/C++ Compiler generates a project directory (<result>.prj/) and a set of IP files per device image (a set of kernels that are part of the same system). You can control this with the -fsycl-device-code-split=<off|per_source|per_kernel> option.
The <result>.prj/ directory generated by the compiler contains all the files that you need to include your IP component in an Intel® Quartus® Prime project, including the following files:
An ip format file that you can add to your Intel Quartus Prime projects.
An ip format file that Platform Designer can read.
An example of how to instantiate the IP into other Verilog modules.
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