Evaluate Your Kernel Through Simulation (Beta)
The Questa*-Intel® FPGA Edition simulator software assesses the functionality of your kernel.
The simulator flow (Beta) generates a simulation binary file that runs on the host. The hardware portion of your code is evaluated in an RTL simulator, and the host portion is executed natively on the processor. This feature allows you to simulate the functionality of your kernel and iterate on your design without needing to compile your kernel to hardware and running on the FPGA each time.
The performance of the simulator is very slow when compared to that of hardware. So, Intel recommends using a smaller data set for testing.
Use the simulator when you want an insight into the dynamic performance of your kernel and more information about the functional correctness of your kernel than emulation or the reporting tools provide.
The simulator is cycle accurate and bit-accurate, has a netlist identical to generated hardware, and can provide full waveforms for debugging. View the waveforms with Siemens* EDA (
formerly Mentor Graphics
) Questa* software.