5.4. Erase Phase
The Erase phase clears the flash sectors in preparation for the program phase of the .jic programming file.
Figure 14. Erase Flow Template (Micron* Example)
With the implementation of a loop, the Quartus® Prime Programmer continuously sends the 06h (Write Enable), D8h (Sector Erase), and 05h (Read Status Register) flash opcodes until the .jic ends.
You must make sure of the following in the Sector Erase action box:
- Erase size (byte): The number of bytes erased with D8h opcode. Different flashes can have different erase bytes size.
- Addressing mode (byte): Ensure is aligned with the byte addressing from the initialization phase.
- Leave the rest at default.
- Read Status Register until you get an Erase Done, with max attempts of 30000 and a short delay in between.
Note that, the Delay(us) in the Sector Erase action box is left zero. This is a valid approach because the example replaces a waiting mechanism to a polling mechanism. Both waiting and polling mechanisms serve the same purpose of halting any Programmer action when the QSPI flash is busy. To halt the Programmer, you can:
- Either wait for a minimum delay for Sector Erase as specified in the AC specifications of the respective flash device datasheet, or
- Periodically poll the WIP bit of the QSPI flash's Status Register.
In this example, the Read Status Register action box periodically checks the status of all erase operations, and continues to the next sector erase when the flash is idle. The time taken to perform a sector erase should be less than the total time of the Read Status Register action box (Attempt count X Delay).