6.1. Cypress* S25HS512T with Cyclone® 10 GX
| Item | FPGA Requires? | Flash Provides? |
|---|---|---|
| I/O Voltage | 1.8 V | 1.8 V |
| Byte Addressing | 4-byte | 3-byte or 4-byte |
| Disable Flash ID Check | – | Yes |
| Standard SPI Mode | Yes | Yes |
| Quad IO Mode | Yes | Yes |
| Sector Size | – | Non-uniform size3 |
| QSPI Read Opcode |
|
0Bh and EBh |
| Parameters | Value |
|---|---|
| Device Name | <any name meaningful to you> |
| Device ID | 0x34 0x2B 0x1A |
| Device I/O Voltage | 1.8 V |
| Device density | 512 Mb |
| Total device die | 1 |
| Single I/O mode dummy clock | 8 |
| Quad I/O mode dummy clock | 8 |
| Programming flow template | Cypress |
| Flow Phase | Changes Made | Action Block | Details |
|---|---|---|---|
| Initialization | Set up Read ID by defining Expected data as 0x34 0x2B 0x1A.
Set up Write status register by,
Set up Read status register to include error bits along with the busy bit. Remove the redundant Set 4 byte addressing action block. |
READ_REG | Name: Read ID Command: 0x9F Data Length(byte): 3 Expected Data: 0x34 0x2B 0x1A Expected Data Mask: - Attempts Count: 1 Delay(us): 0 Command-Data: 1-1 |
| WRITE_REG | Name: Write enable Command: 0x06 Data: - Delay(us): 0 Command-Data: 1-1 |
||
| WRITE_REG | Name: Write registers Command: 0x01 Data: 0x00 0x02 0x88 0x08 Delay(us): 0 Command-Data: 1-1 |
||
| READ_REG | Name: Read status register Command: 0x05 Data Length(byte): 1 Expected Data: 0x0 Expected Data Mask: 0x63 Attempts Count: 10000 Delay(us): 100 Command-Data: 1-1 |
||
| Program | Setup Page program with the correct delay, by changing Delay (us) to 2175. |
WRITE_REG | Name: Write enable Command: 0x06 Data: - Delay(us): 0 Command-Data: 1-1 |
| WRITE_DATA | Name: Page program Command: 0x02 Address: JIC Data: JIC Page Size: 256 Addressing Mode(byte): 4 Delay(us): 2175 Command-Address-Data: 1-1-1 |
||
| Erase | Set up Read status register with sufficient sector erase time, by changing Attempt count to 60000. | WRITE_REG | Name: Write enable Command: 0x06 Data: - Delay(us): 0 Command-Data: 1-1 |
| ERASE | Name: Sector erase Command: 0xD8 Address: JIC Erase Size(bytes): 262144 Addressing Mode(byte): 4 Delay(us): 0 Command-Address: 1-1 |
||
| READ_REG | Name: Read status register Command: 0x05 Data Length: 1 Expected Data: 0x0 Expected Data Mask: 0x01 Attempt count: 60000 Delay(us): 100 Command-Data: 1-1 |
||
| Verify/Blank-Check/Examine | – | READ_DATA | Name: Read Command: 0x03 Address: JIC Data Length: JIC Expected Data: JIC Expected Data Mask: JIC Addressing Mode(byte): 4 Dummy Clock Cycle: 0 Delay(us): 0 Command-Address-Data: 1-1-1 |
| Termination | Remove the redundant Exit 4 byte addressing action block. | – | – |