Thermal Design User Guide: MAX® 10 FPGA B610 Package

Download PDF
ID 851247
Date 5/20/2025
Public
Document Table of Contents
Document Table of Contents x
1. Introduction to MAX® 10 FPGA B610 Package Thermal Design Guidelines 2. MAX® 10 FPGA B610 Package Mechanical Construction 3. MAX® 10 FPGA B610 Package CTM Construction 4. Quartus Requirements and Power Estimation 5. General FPGA Thermal Design Considerations 6. Thermal Design Process 7. Thermal Solution Mechanical Design 8. Vendor References 9. Document Revision History for the MAX® 10 FPGA B610 Package Thermal Design User Guide A. Thermal Design Elements
1. Introduction to MAX® 10 FPGA B610 Package Thermal Design Guidelines x
1.1. Thermal Design Requirements 1.2. Definitions of Thermal and Power Terms Used in this Document
2. MAX® 10 FPGA B610 Package Mechanical Construction x
2.1. Thermal Design Process Flow 2.2. Thermal Resistance Values Summary
3. MAX® 10 FPGA B610 Package CTM Construction x
3.1. CTM File Format 3.2. Thermal Modeling with the CTM 3.3. Obtaining the CTM
4. Quartus Requirements and Power Estimation x
Input system thermal parameters into QPA 4.1. Board Thermal Model 4.2. QPA Outputs
5. General FPGA Thermal Design Considerations x
5.1. FPGA Power Considerations 5.2. FPGA Maximum Allowed Power Dissipation 5.3. Static, Dynamic, and Standby Power
6. Thermal Design Process x
6.1. Package Heat Flow Path 6.2. Recommended Thermal Design Methodology
7. Thermal Solution Mechanical Design x
7.1. Mechanical Design 7.2. TIM2 Selection 7.3. Summary
7.1. Mechanical Design x
7.1.1. Bond Line Thickness (BLT) 7.1.2. Die Warpage 7.1.3. Package Loading 7.1.4. Recommended Pressure Variation Across the Package
7.2. TIM2 Selection x
7.2.1. Gap Pad TIMs 7.2.2. Gap Pad TIM Thermal Conductivity Data 7.2.3. Parametric Studies with Different TIM Materials
1. Introduction to MAX® 10 FPGA B610 Package Thermal Design Guidelines
2. MAX® 10 FPGA B610 Package Mechanical Construction
3. MAX® 10 FPGA B610 Package CTM Construction
4. Quartus Requirements and Power Estimation
5. General FPGA Thermal Design Considerations
6. Thermal Design Process
7. Thermal Solution Mechanical Design
8. Vendor References
9. Document Revision History for the MAX® 10 FPGA B610 Package Thermal Design User Guide
A. Thermal Design Elements

4. Quartus Requirements and Power Estimation

Quartus Power Analyzer (QPA) helps designers to calculate the power of the device based on the input configurations.

Input system thermal parameters into QPA

Because dynamic power is a function of the junction temperature, QPA iteratively calculates the device power for a junction temperature that results from the use-case power and the ambient thermal conditions. Depending on the maturity of the design, it is recommended to use a margin to accommodate changes to the power as the design is modified.

When a given device is loaded into QPA, the QPA Thermal tab automatically loads parameters characteristic to that device. The following are set values for a particular package, and cannot be modified:

  • PDYNAMIC V/S TJ curve
  • Junction-to-board thermal resistance: ӨJB
  • Junction-to-case thermal resistance: ӨJC
  • Thermal interface material (TIM) thermal resistance: ӨCS

The following are user inputs that you can specify:

  • Ambient temperature: TA
  • Cooling solution size and airflow, resulting in ӨSA
  • Board thermal model type
  • Board temperature: TB

You have the option to change any of the parameters to match your system configuration.

Figure 4. QPA Thermal Tab for Input Parameters

Section Content
Board Thermal Model
QPA Outputs

Level Two Title