6.5. Clock Connections for SyncE Operation on F-Tile
To enable the recovered clock output from F-tile, select the Enable dedicated CDR clock output in the IP parameter editor. This option is only available for Ports 8 through 15 (i.e. FGT Quads 2 and 3).
Once enabled, the CDR clock output is available on the o_p<n>_cdr_divclk port of the IP. In order to determine the frequency of this port, use the methodology specified in section 5.5 (Clock Connections in Synchronous Ethernet Operation) in the F-tile Ethernet Hard IP User Guide.