Ethernet Subsystem Intel® FPGA IP User Guide

ID 773413
Date 8/29/2023
Public

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7. Register Descriptions

This section displays the available register address range for the Ethernet Subsystem Intel FPGA IP (Early Access) that you can access using the AXI-Lite interface. The Subsystem IP supports up to 16 Ethernet port instances.

When you request a CSR access through AXI-Lite interface, this request will be translated internally to Avalon® memory-mapped protocol and the request address will be decoded based on the address maps shown in this section and routed to the correct destination reconfiguration interface.

Since AXI-Lite supports byte addressing, for E-tile, incoming AXI-Lite read/write address will be divided by 4 to generate 32-bit addresses before issuing the request into E-tile Hard IP for Ethernet.

For F-tile, the Reconfiguration Avalon® memory-mapped interfaces support write byte enables so the incoming AXI-Lite read/write address will be decoded and directly mapped to the transceiver Avalon® memory-mapped interface.

The Ethernet SS AXI-Lite interface does not support unaligned access and any requests with unaligned access will be translated to full aligned access, ignoring the lower 2 address bits on the request.

Note: Write operations to a read-only register field have no effect. Read operations that address a reserved register return an unspecified result. Write operations to reserved registers have no effect. Accesses to registers that do not exist in your IP core variation, or to register bits that are not defined in your IP core variation, have an unspecified result.
Table 44.  E-Tile Register Base Addresses
Base Address Description
0x000_0000 Subsystem Registers
0x020_0000 Port0
0x040_0000 Port1
0x060_0000 Port2
0x080_0000 Port3
0x0A0_0000 PTP Channel (EHIP Channel 4)
0x0C0_0000 PTP Channel (EHIP Channel 5)
0x0E0_0000 PTP Channel (EHIP Channel 6)
0x100_0000 PTP Channel (EHIP Channel 7)
0x120_0000 Port4
0x140_0000 Port5
0x160_0000 Port6
0x180_0000 Port7
0x1A0_0000 Port8
0x1C0_0000 Port9
0x1E0_0000 Port10
0x200_0000 Port11
0x220_0000 PTP Channel (EHIP Channel 16)
0x240_0000 PTP Channel (EHIP Channel 17)
0x260_0000 PTP Channel (EHIP Channel 18)
0x280_0000 PTP Channel (EHIP Channel 19)
0x2A0_0000 Port12
0x2C0_0000 Port13
0x2E0_0000 Port14
0x300_0000 Port15