4.4. Dynamic Reconfiguration Extension Subsystem
The main functionality of the DR Extension Subsystem is to provide a standard mechanism for external software to allow you to dynamically reconfigure a subset of the transceiver channels to operate in different modes (e.g.: data rates) without impacting the adjacent active channels.
The Host CPU communicates with the NIOS soft microcontroller via four 32 bits registers, HSSI Command/Status, HSSI Control/Address, HSSI Write Data, and HSSI Read Data CSRs. The control registers are 32 bits read/write which travel from the external host software to the NIOS. The detail of HSSI Control and Status 0/1 usage are covered in Subsystem Abstraction Layer section.
The external software can make simple “peek/poke” style transaction requests to the NIOS using a traditional asynchronous handshake procedure. You must be aware that the NIOS is not optimized for speed. It is expected to take a few microseconds to complete and acknowledge most transactions.
The following table shows the signals mapping between 100G and 25G AXI-ST on the same interface.