Intel Agilex® 7 M-Series FPGA Network-on-Chip (NoC) User Guide

ID 768844
Date 7/05/2023

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Document Table of Contents Step 1: Make Group Assignments in the NoC Assignment Editor

After completing Analysis & Elaboration and opening the NoC Assignment Editor, the Group tab displays two columns:
  • Network Interface Unit column—displays a list of all NoC initiator, target, PLL, and SSM elements in your design.
  • Group Name column—assign each of the elements to one of two groups by entering the name of the group. You can define a custom, case-insensitive Group Name. Group names support alphanumeric and underscore ‘_’ characters.

Figure 22. NoC Assignment Editor Group Tab shows an example with NoC initiators and targets assigned to groups NOC_GROUP_0 and NOC_GROUP_1. During the Fitter stage, one group is associated with the hard memory NoC that runs along the top edge of the die. The other group is associated with the hard memory NoC that runs along the bottom edge of the die. You can optionally specify which group is associated with which edge using Interface Planner. Otherwise, the Fitter automatically assigns this association during design compilation.

Each group must contain the NoC initiators and targets that you connect through that hard memory NoC, as well as the NoC PLL and SSM contained within an instance of the NoC Clock Control IP.

Figure 22. NoC Assignment Editor Group Tab

Note: Use the scrollbar at the right side of the window to view additional NoC elements below.

The following shows the equivalent .qsf assignment for assigning a hard memory NoC element to a group:

set_instance_assignment -name NOC_GROUP \
  <user-assigned noc group name> -to <hierarchical path name>