Intel Agilex® 7 M-Series FPGA Network-on-Chip (NoC) User Guide

ID 768844
Date 7/05/2023
Public

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3.4. Fabric NoC

If you configure the NoC initiator with a 512-bit or 576-bit wide read data path, the NoC initiator implements a feature known as the fabric NoC. The fabric NoC is a hardware extension to the NoC initiator that delivers read data through a group of 16 M20K blocks in the adjacent memory column. The read data width of the NoC initiator doubles (from 256 to 512), which enables the saturation of read bandwidth of HBM2e or external memory at easily obtainable core frequencies. The NoC initiator Intel FPGA IP uses the M20K memories as internal FIFOs, which continues to provide an AXI4 interface for use by your design.

NoC initiators implemented with the fabric NoC consume 16 M20K memory blocks but also result in less congestion for routing resources along the die edge. Also note that NoC initiators with 512-bit or 576-bit wide read data paths do not support narrow or unaligned AXI4 transfers.

Figure 11. NoC Initiators With and Without Fabric NoC shows the AXI4 subordinate interface of the NoC initiator. The NoC initiator on the left is shows configuration without the fabric NoC option. All five AXI4 channels (AW, W, B, AR and R) interface to core logic at the die edge. The NoC initiator on the right shows the configuration with the fabric NoC option. The AW, W, B, and AR AXI4 channels still interface to core logic at the die edge, but the read data transfers through the M20K memory blocks into the fabric, reducing routing congestion along the die edge.

Figure 11. NoC Initiators With and Without Fabric NoC