Intel® Agilex® 7 M-Series FPGA Network-on-Chip (NoC) User Guide

ID 768844
Date 5/22/2023

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.2.1. UIB Segments

UIB segments are NoC segments that interface with the UIB to connect to HBM2e memory. These UIB segments consist of three subsegments, each aligned with an FPGA clock sector. Overall, the UIB segment consists of the following:

  • Nine AXI4 initiators on the FPGA fabric side.
  • Sixteen AXI4 targets on the UIB side.
  • Six AXI4 Lite targets on the UIB side.
  • A network of switches that transfer packets laterally along the hard memory NoC and connect to the AXI4 initiators and target.
Figure 3. NoC UIB Segment

Note: There is an additional service network running parallel to the main switch network. This service network connects the NoC SSM to the AXI4 Lite initiators and targets. NoC initiators can send transactions over the main network to the NoC SSM to access the service network for sideband configuration and system monitoring. Figure 3. NoC UIB Segment does not show this network.