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1. Introduction
2. Interface Overview
3. Parameters
4. Designing with the IP Core
5. Functional Description
6. Configuration Registers for MACsec IP
7. MACsec Intel® FPGA IP Example Design
8. MACsec Intel FPGA IP User Guide Archives
9. Document Revision History for the MACsec Intel FPGA IP User Guide
2.2.1.1. Common Port Mux Interface
2.2.1.2. Common Port Demux Interface
2.2.1.3. Controlled Port Mux Interface
2.2.1.4. Controlled Port Demux Interface
2.2.1.5. Uncontrolled Port RX Interface
2.2.1.6. Uncontrolled Port TX Interface
2.2.1.7. Management Interface
2.2.1.8. Decrypt Port Mux Management Interface
2.2.1.9. Decrypt Port Demux Management Interface
2.2.1.10. Encrypt Port Mux Management Interface
2.2.1.11. Encrypt Port Demux Management Interface
2.2.1.12. Crypto IP Management Bus
2.2.1.13. Miscellaneous Control Signals
2.2.2.1. Common Port Mux Interface Waveform
2.2.2.2. Common Port Demux Interface Waveform
2.2.2.3. Controlled Port Mux Interface Waveform
2.2.2.4. Controlled Port Demux Interface Waveform
2.2.2.5. Uncontrolled Port RX Interface Waveform
2.2.2.6. Uncontrolled Port TX Interface Waveform
2.2.2.7. Crypto RX Waveform
2.2.2.8. Crypto TX Waveform
2.2.2.9. MACsec Management Interface (Read)
2.2.2.10. MACsec Management Interface (Write)
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5.7.3. Byte Ordering
The Crypto QHIP/SIP implements little-endian byte order for the packet fields, For example, AAD and data where bits [7:0] contains the first byte of the corresponding field.
Ethernet Packet Field | Crypto Field | Crypto Interface aes_ip_app_tx_tdata |
---|---|---|
N/A | IV[7:0] (Post byte order swapping) | [7:0] |
N/A | .. | [15:8] |
N/A | .. | [23:16] |
N/A | .. | [31:24] |
N/A | .. | [39:32] |
N/A | .. | [47:40] |
N/A | .. | [55:48] |
N/A | .. | [63:56] |
N/A | .. | [71:64] |
N/A | .. | [79:72] |
N/A | .. | [87:80] |
N/A | IV[95:88] | [95:88] |
N/A | AAD_LEN[7:0] | [103:96] |
N/A | AAD_LEN[15:8] | [111:104] |
N/A | AAD_LEN[23:16] | [119:112] |
N/A | AAD_LEN[31:24] | [127:120] |
Dest Addr[47:40] | AAD[7:0] | [135:128] |
Dest Addr[39:32] | AAD[15:8] | [143:136] |
Dest Addr[31:24] | AAD[23:16] | [151:144] |
Dest Addr[23:16] | AAD[31:24] | [159:152] |
Dest Addr[15:8] | AAD[39:32] | [167:160] |
Dest Addr[7:0] | AAD[47:40] | [175:168] |
Src Addr[47:40] | AAD[55:48] | [183:176] |
Src Addr[39:32] | AAD[63:56] | [191:184] |
Src Addr[31:24] | AAD[71:64] | [199:192] |
Src Addr[23:16] | AAD[79:72] | [207:200] |
Src Addr[15:8] | AAD[87:80] | [215:208] |
Src Addr[7:0] | AAD[95:88] | [223:216] |
MACSEC Ethertype[15:8] | AAD[103:96] | [231:224] |
MACSEC Ethertype[7:0] | AAD[111:104] | [239:232] |
.. | AAD[…:112] | […:240] |