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1. About the RiscFree* IDE
2. Installation and Setup
3. Getting Started with RiscFree* IDE
4. Debug Setup for Nios® V Processor System
5. Debug Setup for Arm* Hard Processor System
6. Debugging with RiscFree* IDE
7. Debugging with Command-Line Interface
8. Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide Archives
9. Document Revision History for the Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide
A. Appendix
6.1. Debug Features in RiscFree* IDE
6.2. Processor System Debug
6.3. Heterogeneous Multicore Debug
6.4. Debugging µC/OS-II Application
6.5. Debugging FreeRTOS Application
6.6. Debugging Zephyr Application
6.7. Arm* HPS On-Chip Trace
6.8. Debugging the Arm* Linux Kernel
6.9. Debugging Target Software in an Intel® Simics Simulator Session
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6.7.1. Trace Bar
You can control the trace process using the Trace Bar.
Figure 39. Trace View Bar Options
Trace Bar | Function | Description |
---|---|---|
1 | Fetch Trace | Fetches the trace data from the target trace buffer, decode and populate it in the Trace view. |
2 | Clear Trace | Clears the trace view and the target trace buffer data. |
3 | First Page | Navigates the trace data when there are multiple pages of trace information. |
4 | Previous Page | |
5 | Next Page | |
6 | Last Page | |
7 | Start Capture | Starts the trace capturing. Applicable only when you manually stop the trace using Stop Capture. |
8 | Stop Capture | Stops the trace. |