Ashling* RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide

ID 730783
Date 5/13/2024
Document Table of Contents

4.3. Setting Debug Configurations and Downloading Nios® V Processor Project Using RiscFree* IDE

You can download and debug a Nios® V processor software project on the targeted Intel® FPGA using the RiscFree* IDE. To debug the project, follow these steps:

  1. Right-click the project folder (application or BSP) in the project explorer and select Debug As > Debug Configurations.
  2. Select Ashling RISC-V (auto-detect) Hardware Debugging > <PROJECT_NAME>. Ensure the Project and C/C++ Application match with your project name and your project .elf file respectively.
  3. Under the Main tab, for C/C++ Application, browse to select the application build .elf file. For example: hello.elf.
    Figure 5. Debug Configurations for Nios® V Processor —Main Tab
  4. Under the Debugger tab, set these settings:
    • Debug probe: 1 (USB-Blaster II)
    • Transport type: JTAG
    • JTAG frequency: 16 MHz
    Figure 6. Debug Configurations for Nios® V Processor —Debugger Tab
  5. Click Auto-detect Scan Chain to automatically detect JTAG scan chain information of the target device. Select the options from Device/Tap selection and Core selection.
  6. Based on the OS you use, configure the OS Awareness settings as follows:
    • Intel® HAL: No OS Awareness configuration is required.
    • Other OS: Under the OS Awareness tab, turn on Enable OS Aware Debugging, and select the OS version applicable to you as listed below:
      • µC/OS and Version: II
      • FreeRTOS and Version: 10.4.1
      • Zephyr and Version: 3.1.0
    Figure 7. Enabling OS Aware Debugging in RISC-V Hardware Debugging
  7. Click Debug. RiscFree* IDE downloads the program to the target and you can find the console prints as shown in the following diagram.
    Figure 8. Console Prints after Debug Connection is Successful
  8. Refer to the Debugging with RiscFree* IDE section for further debugging.
    Note: You can issue a debug reset using niosv-download -r command. This command only resets the Nios® V processor if the debug reset interface is connected to the Nios® V processor IP's reset input in your Platform Designer.
    Note: niosv-download (under <Intel Quartus Prime installation directory>/niosv/bin directory) is only available for the Quartus® Prime software. This tool is not available for standalone RiscFree* IDE installation with the Quartus® Prime Programmer and Tools.