AN 882: Using ADI AD9217 with Intel® Stratix® 10 Devices

ID 683700
Date 8/17/2020
Document Table of Contents

1.7. Simulation1.11.4. Simulation

Figure 9. Figure 18. Simulation Environment

The data pattern sequence block generates the calibration sequence data, which is serial loopbacked and is provided as an input to the PHY receiver (RX).