Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 10/04/2021

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6.3.11. Snapping to a Region

Chip Planner supports snap-to-lab for the Logic Lock region, where the Logic Lock region created is always snapped to a lab. It is applicable to clock regions in Intel® Arria® 10 and Intel® Agilex® FPGAs, and clock sector in Intel® Stratix® 10 FPGA.

By default, Logic Lock regions are always snapped to the lab. You can change the default by clicking View > Logic Lock Regions > Snap Logic Lock Region to.

Note: As observed in the following image, clock regions or sectors are visible (with orange boundary) when you perform an operation in Logic Lock region (for example, create, resize, or move the region) and snap-to-clock-region. It is not visible for snap-to-lab.
Figure 82. Snapped to the Region

When you snap to a region, the Logic Lock region boundaries are displayed in the interactive mode. You can observe following behaviors:

  • Creating Region: Left-click on the mouse to create the Logic Lock region. Upon releasing the mouse, the created Logic Lock region snaps to the containing clock region or sector.
  • Resize region (and resize diagonal): Left-click on the mouse and drag the Logic Lock region handle. Upon releasing the mouse, the Logic Lock region resizes and snaps to the containing clock region or sector.
  • Move region: Select and drag the Logic Lock region to highlight the clock region boundaries. Upon releasing the mouse button, the Logic Lock region moves to the new position and snaps to the containing clock region or sector.
    • Same place and route regions are moved: Both Logic Lock regions move and snap to the containing clock sectors.
    • Only place | route region is moved: The selected region moves and snaps to the clock sector, and prompts warning if the new location or size of the region does not adhere to 'place bboxes contained within route bboxes' rule.
  • Subtract or make a hole: When performing subtract in the snap-to-clock-region mode, you create a region where the region is snapped to a clock region or a sector, and then subtract away.