Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 10/04/2021

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6.3.2. Logic Lock Regions

Logic Lock regions are floorplan location constraints. When you assign instances or nodes to a Logic Lock region, you direct the Fitter to place those instances or nodes within the region. A floorplan can contain multiple Logic Lock regions.
Note: As a best practice, define resource placement with iterative design flows. Use techniques like the Early Place Flow to guide your floorplanning decisions before setting hard placement constraints.

Logic Lock regions do not have preservation attributes, just boundaries and reservation of logic resources. You can use Intel® Quartus® Prime Pro Edition software to implement fully hierarchical Logic Lock region assignments.

A Logic Lock region is composed of two elements:

  • Placement Region: Constrains logic to a specific area of the device; the Fitter places the logic in the region you specify. If you designate a region as Reserved, the Fitter cannot place other logic in the region.
  • Routing Region: Constrains routing to a specific area. By default, routing regions are unconstrained. The routing region must encompass the placement region. A routing region cannot be reserved. For more details, refer to Defining Routing Regions.