Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 10/04/2021

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Document Table of Contents Fast Forward Timing Closure Recommendations

When running Fast Forward compilation, the Compiler removes signals from registers to allow mobility within the netlist for subsequent retiming. Fast Forward compilation generates design-specific timing closure recommendations, and predicts maximum performance with removal of all timing restrictions.

After you complete Fast Forward explorations, you can determine which recommendations to implement to provide the most benefit. Implement appropriate recommendations in your RTL, and recompile the design to achieve the performance levels that Fast Forward reports.

The Fast Forward Details Report provides the following information:

Table 14.  Fast Forward Details Report Information
Name Description
Step Displays the various Fast Forward optimization steps, starting from the pre-optimization base compilation.
  • Each step comes with its associated critical chain.
  • Each step corresponds to a new optimization cumulative to the previous step.
Fast Forward Optimization Analyzed Summary of the optimizations necessary to implement each step.
Estimated fMAX Estimated fMAX performance after you implement the recommendations for this step in your design. This is cumulative, and step n represents the potential fMAX after implementing all previous steps.
Optimization Analyzed (cumulative) List of all the consecutive optimization steps applied.
Recommendation for Critical Chain Lists recommended changes to your designs. These recommendations are geared towards removing retiming limitations, and allowing register movement.