Nios® V Processor Reference Manual

ID 683632
Date 5/25/2025
Public

Visible to Intel only — GUID: xla1629681481097

Ixiasoft

Document Table of Contents

3.4.1. Privilege Levels

The privilege levels in Nios V/m processor are designed based on the RISC-V architecture specification. The supported privilege levels available are Machine Mode (M-mode) and Debug Mode (D-mode).