Visible to Intel only — GUID: upb1675066967592
Ixiasoft
Visible to Intel only — GUID: upb1675066967592
Ixiasoft
4.3.12.2. Address Map
- Reset Address
- Debug Exception Address
- Peripheral Region Base Address
- Exception Address
- Timer and Software Interrupt Address
You can specify the Reset Address, Debug Exception Address and Peripheral Region Base Address in Platform Designer during system configuration. You can modify the Exception Address stored in the mvtec register. mvtime and mtimecmp register controls the timer interrupt. The msip register bit controls the software interrupt.