Visible to Intel only — GUID: fhk1675050758595
Ixiasoft
Visible to Intel only — GUID: fhk1675050758595
Ixiasoft
4.3.1. General-Purpose Register File
Nios® V/g processor implementation supports a flat register file. The register file contains thirty-two 32-bit general-purpose integer registers. Nios® V/g processor implements the general-purpose register using M20K memories, which do not support two read ports. Hence, Nios® V/g processor duplicates the register files so that two different source registers for an instruction are available in a single cycle. After performing ALU operations, the processor core writes the same result to the destination register in both memories.
Register | ABI | Description |
---|---|---|
x0 | zero | Hardwired to zero |
x1 | ra | Return address |
x2 | sp | Stack pointer |
x3 | gp | Global pointer |
x4 | tp | Thread pointer |
x5 | t0 | Temporary 0 |
x6 | t1 | Temporary 1 |
x7 | t2 | Temporary 2 |
x8 | s0/fp |
|
x9 | s1 | Saved register 1 |
x10 | a0 |
|
x11 | a1 |
|
x12 | a2 | Function argument 2 |
x13 | a3 | Function argument 3 |
x14 | a4 | Function argument 4 |
x15 | a5 | Function argument 5 |
x16 | a6 | Function argument 6 |
x17 | a7 | Function argument 7 |
x18 | s2 | Saved register 2 |
x19 | s3 | Saved register 3 |
x20 | s4 | Saved register 4 |
x21 | s5 | Saved register 5 |
x22 | s6 | Saved register 6 |
x23 | s7 | Saved register 7 |
x24 | s8 | Saved register 8 |
x25 | s9 | Saved register 9 |
x26 | s10 | Saved register 10 |
x27 | s11 | Saved register 11 |
x28 | t3 | Temporary 3 |
x29 | t4 | Temporary 4 |
x30 | t5 | Temporary 5 |
x31 | t6 | Temporary 6 |