Nios® V Processor Reference Manual

ID 683632
Date 5/25/2025
Public

Visible to Intel only — GUID: dus1691737557864

Ixiasoft

Document Table of Contents

4.3.5.1. IEEE 754 Exception Conditions

The FPU offers different IEEE 754 exceptions support when targeting on different Altera FPGA devices. The fcsr register holds the accrued exception flags.
Table 103.  IEEE 754 Exception Support
IEEE 754 Exception Arria® 10, Cyclone® 10 GX Other Altera FPGA devices
Invalid (NV)
Division by Zero (DZ)
Overflow (OF)
Underflow (UF) Incomplete
Inexact (NX) Incomplete