Intel® Stratix® 10 Hard Processor System Component Reference Manual

ID 683516
Date 2/10/2023
Document Table of Contents

3.11. HPS-to-FPGA Trace Port Interface

The HPS‑to‑FPGA trace port interface is connected to an Intel® conduit BFM for simulation. The following table lists the name of each interface, along with API function names for each type of simulation. You can monitor the interface state changes or set the interface by using the API functions listed.

Table 29.  HPS-to-FPGA Trace Port Interface Simulation Model

Interface Name

BFM Name

RTL Simulation API Function Names

Post‑Fit Simulation API Function Names

h2f_tpiu h2f_tpiu_inst get_h2f_tpiu_clk_ctl() get_traceclk_ctl()
set_h2f_tpiu_data() set_trace_data()