Intel® Stratix® 10 Hard Processor System Component Reference Manual
3.1.3.1. Running HPS RTL Simulation
Platform Designer generates scripts for several simulators that you can use to complete the simulation process, as listed in the following table.
Simulator |
Script Name |
Directory |
---|---|---|
Mentor Graphics® Modelsim Intel® Edition |
msim_setup.tcl |
<project directory>/<Platform Designer design name> /simulation/mentor |
Cadence® NC‑Sim |
ncsim_setup.sh |
<project directory>/<Platform Designer design name> /simulation/cadence |
Synopsys* VCS |
vcs_setup.sh |
<project directory>/<Platform Designer design name> /simulation/synopsys/vcs |
Synopsys* VCS‑MX |
vcsmx_setup.sh |
<project directory>/<Platform Designer design name> /simulation/synopsys/vcsmx |
Aldec® RivieraPro™ |
rivierapro_setup.tcl |
<project directory>/<Platform Designer design name> /simulation/aldec |