Arria V GZ Avalon-ST Interface for PCIe Solutions: User Guide

ID 683297
Date 12/21/2020
Document Table of Contents

16.7.2. Using the PIPE Interface for Gen1 and Gen2 Variants

Running the simulation in PIPE mode reduces simulation time and provides greater visibility.

Complete the following steps to simulate using the PIPE interface:

  1. Change to your simulation directory, <testbench_dir>/pcie_<dev>_hip_avmm_bridge_example_design_tb/ip/pcie_example_design_tb/DUT_pcie_tb_ip/altera_pcie_<dev>_tbed_<ver>/sim/altpcie_<dev>_tbed_hwtcl.v.
  2. Open altpcie_<dev>_tbed_hwtcl.v.
  3. Search for the string, serial_sim_hwtcl. Set the value of this parameter to 0 if it is 1.
  4. Save altpcie_<dev>_tbed_hwtcl.v.